We are trying to select a PXIe system to house an AWG we are going to evaluate. The AWG (Keysight M3202A) will support 1.6 GB/s (4 lanes) bandwidth when used with a Gen 2 PCIe link and 400 MB/s (1 lane) when used with a Gen 1 link. We would like to take full advantage of this bandwidth. We will probably have a few other cards in the chassis as well, but nothing that will require appreciable bandwidth.
The PXIe/PCIe-8381 controller pairing seems best, as that will give us 8 lanes of Gen 2 bandwidth from the PC to the PXIe chassis. My question mostly concerns the chassis itself. The PXIe-1082 is most cost-effective; we need an external clock input, eliminating more basic models. The problem is that it only supports 1 GB/s per-slot bandwidth. Where is the bandwidth limitation? From the 1082 manual, it seems that the controller slot has a direct x4 link to slot 2. If we put the AWG in slot 2 and left all other slots empty, why could we not achieve the full bandwidth (1.6 GB/s) of a x4 Gen 2 link? The PEX8612 switch seems to be a Gen 2 device, which seems to imply that the chassis lanes should support Gen 2 speeds.
Thank you for any help you can give.