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ExportedSampClk.Mode and ExportedSampClk.Delay

December 5, 2014, 2:21 am
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Hi,

 

I'm using a Pxie-6548 which is connected to the CB/SCB-2162 thanks to a C68-C68-D4 cable.

I am doing an easy test, just generating from channels 25 to 30 and acquiring from channels 18 to 23 while the channels 25-30 are connected to channel 28-23 (acquisition and generation are synchronous) and sweeping the frequency. Then comparing the acquisition to the generation through " DWDT Digital to Digital Comparison.vi". I have no error in this configuration for all frequency measured (I have a 1MHz step).

 

Then I wanted to understand the effect of ExportedSampClk.Mode. I choose the "Delay" mode and give the value 0.2 to ExportedSampClk.Delay. Then doing the same test, I have now Failed Sample. I wasn't really expecting this, especially that I have failed samplefor different frequency but not all (see attachment). But maybe I'm wrong and this is normal..

If anybody understand this behaviour, could he explain it to me please. Or, do you have an idea what the problem might be?

Little precision, I use the exacte same length of cable for all connections (channels 18-23 to 25-30, Strobe to DDC Clk Out, PFI1 to PFI2), I use data active event which is supposed to eliminate the Round trip Delay (at least this is what I understand from http://zone.ni.com/reference/en-XX/help/370520J-01/hsdio/peliminating_rtd/ ).

 

I also found out that putting Noninverted to ExportedSampClk.Mode while still having the value of 0.2 to ExportedSampClk.Delay has the same behavior as putting delay to ExportedSampClk.Mode and having the value of 0.2 to ExportedSampClk.Delay.

But from the help of ExportedSampClk.Delay, it says "This property is relevant only when the Sample Clock Export Mode property is set to Delayed". Thus I shouldn't have the same behavior.. Does anybody has the same problem?

If not, could it be that there is a problem or a faulty device/software in my environment?

 

thanks in advance,

 

Alex

 

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Experiencing increased channel noise levels on PXIe4497 with 1071 fan on HIGH

December 9, 2014, 7:33 am
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I am using a PXIe-4497 to collect microphone data and when I switch the PXI chassis 1071e fan to HIGH setting, the noise level increases.  The chassis is outside of an isolated test chamber, so the noise isn't occuring acoustically.  Please see the FFT plot below of fan on AUTO (white trace) and fan on HIGH (red trace).  Has anyone had this issue?

 

 

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Experiencing increased channel noise levels on PXIe4497 with 1071 fan on HIGH

December 9, 2014, 7:32 am
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I am using a PXIe-4497 to collect microphone data and when I switch the PXI chassis 1071e fan to HIGH setting, the noise level increases.  The chassis is outside of an isolated test chamber, so the noise isn't occuring acoustically.  Please see the FFT plot below of fan on AUTO (white trace) and fan on HIGH (red trace).  Has anyone had this issue?

 

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pxie-5186 front panel label

December 11, 2014, 11:36 am
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Do anyone know where I can get a replacement front panel label for a PXIe-5186? Ive got one that has a bid gash in it and it looks terrible. the card works just fine. the front of it just looks real bad. Any help would be greatly appreciated! Thanks!

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Can I PLL the PXI-6115 master timebase to the PXI_CLK10 exported by PXI-6652 in a PXI-1036 chassis?

December 12, 2014, 6:30 am
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System Components:

  • PXI-1036 chassis connected vi MXI-Express to a laptop
  • PXI-6652 Timing and Synchronization Control module
  • PXI-6115 S-Series Multifunction DAQ
  • PXI-5412 Function Generator

 

I want to use the 6652 to improve the timing accuracy of the FGEN and AI sampling from the 6115. 

  • The chassis clock and 5412 on-board clock, have accuracy of +/-25ppm.
  • The 6115 timebase has an accuracy of +/- 0.01% (100ppm).
  • The 6652 has an initial accuracy of +/-2.5ppm, plus long term and temperature stability of +/-1ppm and +/-2ppm respectively, or roughly an order of magnitude improvement over the other devices.

 

The 1036 chassis has a switch (S1) to choose between "BP ENABLE" and "SLOT2 ENABLE" for the PXI_CLK10 signal shared with all the modules.  I have set this switch to "SLOT2 ENABLE."

 

Based on this Knowledge Base article (Can my S Series Device Synchronize its Timebase to the 10 MHz Clock on the PXI Backplane?) the 6115 will phase-lock to the chassis 10 MHz backplane clock at power up.

 

The trouble is that the 10 MHz backplane clock is not present at power up.  I've set the switch to replace the chassis clock with the Slot 2 (6652) clock, but I then have to configure the 6652 to export its TCXO oscillator to the PXI_CLK10_IN through software, which obviously happens AFTER power up.

 

  • Have I made any mistakes in my understanding outlined above?
  • What does the 6115 phase-lock to if there is no backplane clock at power up? 
  • Can the state of the phase-lock be read in software? 
  • Can the phase-lock be re-initiated in any way once I've got the 6652 clock onto the chassis backplane?
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PXIe-4330 Remote Sense

December 15, 2014, 2:48 pm
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I'm trying to get the remote sense on the PXIe-4330 to work. I've have a bridge based sensor connected as the manual shows it. I cannot find a property node that enable the remote sense. Does the remote sense automatically work when hooked up or does it need to be configured?

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PXI MTBF

December 16, 2014, 2:01 am
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Hi,

I am looking for the MTBF of the following references:

- PXI-8119

- PXI-6713

- PXI-4071

- PXI-6511

- PXI-6512

- PXI-6513

 

Thank you for your help,

 

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I have a PXIe-8381 board that is no longer being found in the system. I have a blinking red light on the front panel. This has worked well for about six months.

December 16, 2014, 2:28 pm
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This system has worked for several months but now is not being found in the automation explorer. As stated the front panel of the module has a blinking red light.  It looks like the led on the express card is solid amber. Can see lights on the side of the card appear green though the holes in the top pane. I am new to PXI most of my NI hardware related experience is with SCXI  I do not know my way around the chassis on the PXI equipment.  Any suggestions on where to start.


Thanks,

 

Randall

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pxi-5122 vs pxi-5122ex

December 17, 2014, 9:46 am
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what are the differences between the PXI-5122 and PXI-5122EX? does the EX have the same functionality as the non-EX, but with additional functionality? is the EX a drop in replacement for the non-EX? are there difference software requirements for the EX vs the non-EX? is there a specific datasheet/manual for the PXI-5122EX?

 

any help would be greatly appreciated!

 

thanks!

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PXImc Desktop Target Hardware Configuration

December 18, 2014, 2:15 am
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Hello NI Users,

 

I would like to build up a testbench by using PXImc with an PXIe-chassis (1082) and a Desktop Target (PCIe-8381), both running Pharlap ETS 13.1.

 

Unfortunatly I need a special hardware configuration for my x86. You can see the minimum requirements below:

 

  • CPU: 4 real cores or bigger (without HT)
  • PCIe 8x-Slot (or bigger)
  • PCIe 4x-Slot (or bigger)
  • PCIe 1x-Slot (or bigger) in case the ethernet adapter is not supported
  • PCI-Slot

We tried a configuration with an DELL OptiPlex 9020. The motherboard has an Intel® Q87 Express Chipset. And we tried it on another motherboard with an Intel® Q67 Express Chipset. Both had the two problems mentioned below

Other x86 Desktop Computers from around 2009 with a DualCore CPU can establish the connection and PXImc works fine. But the boards we tested did not have the required PCI-Slots.

 

Problems:

  1. One core of the x86 is stuck at 100% if the PXImc cards (PXIe-8383mc and PCIe-8381) are connected.
  2. Both targets can't establish the PXImc connection to the PXI-chassis. We can find the PCIe-8381 in MAX but not the PXI-8383mc (When using the older x86 we can see both the 8381 and the 8383 in the x86 target in MAX)

 

Based on information given by a NI Support Member our installation process was:

  1. Install Pharlap, LabView RT 14 and PXImc 14.0.0 with the cards removed from the pc
  2. Install PCIe8381 and connect to PXIe8383mc
  3. Boot into Pharlap

So I need your help, who of you works succesfully with PXImc and which motherboard/chipsets/hardware configurations are you using?

 

I have been on the reguirement page of NI http://www.ni.com/white-paper/8239/en/#toc5 but under the point Motherboard the Informations does not help at all.

 

I'm looking forward on your recommendations.

 

Thanks

Andreas

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Can MXI-4 cables be daisy chained?

December 18, 2014, 2:59 pm
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I want to connect two 5m MXI-4 cables end to end.  Is that possible and would it degrade signal integrity? 

 

I have a PXI chassis inside a large system and the MXI cable is routed through the system to the PC. there isn't easy access to where the MXI-4 connects to the chassis.  I need to be able to connect to the chassis with a diffenent PC for onsite calibration.  Would I be able to connect a second MXI-4 cable to the exisiting one?  

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NI power quality analyzer

December 18, 2014, 11:02 pm
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Hello

I have to build power analyser such as "voltech PM 600" using labview,I have gone through the power quality analyzer tool kit can i use it for the same?any heads up on how to start? 

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capacitance of cable - SH6868

December 19, 2014, 4:53 am
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Hello ,

I am using cable SH6868 - 182419-01 in my project. I need the capacitance of this cable as i couldn't find in the data sheet.

So that, i can select op-amp buffer which can drive the cable capacitance.

 

 

Regards,

Govind.

 

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Shorting PXI-7854R DIO pins together

December 19, 2014, 7:26 am
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We're building a self test fixture for PXI-7854R FPGA card.  We'd like to connect two DIO pins directly together to perform a "loop back" test to verify FPGA card itself, as well as the wiring and connector pins attached to it.  For example, short DIO1 to DIO5 pins.  Drive DIO1 "high" then read DIO5 "high".  Drive DIO1 "low" then read DIO5 "low".  And test other DIO pins in the same fashion.

 

My question is, is it electrically safe to short DIO pins together, one driven as output then read the other?  And is it safe to change the direction - write to DIO5 then read DIO1 using the above example?  Any special considerations in power up sequence etc?

 

I appreciate any info or link to a reference document.

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Should PFI I/O Be Set To A Default Setting Before Use?

December 19, 2014, 8:40 am
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Hi everyone, I am using the PFI lines on my PXI DAQ Card (6229) for Counter Output frequency generation and Counter Input frequency readings.  I know these lines on power up of the PXI card are set to high impedance mode by default.  Should these lines be set to digital LOW '0' before setting them up for Counter Output or Counter Input use?  Is it good practice to set up the PFI lines to a default state before using them in an application?

 

Thanks!

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PCI6703 AO adjument

December 22, 2014, 5:26 pm
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我在根据《NI 6703/6704 Calibration Procedure for NI－DAQmx》做6703的外部校准，使用Labview运行环境。

其中第8步， Repeat step 4 through 7 replacing AO 0（V）with  _cal_ao_voltage_offset .Continue to repeat step 7 with various values in _cal_ao_voltage_offset until you have gennerated approximately 0 V on  AO 0(V).

  让我感到非常疑惑，因为这一步中 “_cal_ao_voltage_offset"对于函数 ”DAQmx Create AO VoltageChan"中通道来说    是非法参数！ 且其中提到了，"Various value"该如何调整？

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Windows 7 Upgrade

December 24, 2014, 9:30 am
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We have completed a Windows XP to 7 update with a PXI-8108 and getting a dxgkrnl.sys BSOD error peridically. Anyone have an experience with this? Or updating to Windows 7?

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help me ni5661 am-ssb demodulation example?

December 25, 2014, 4:39 am
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hi my friends

 

i`m a student

 

i need help to make demodulation am-ssb  and listen the modulated signal on speaker >

 

i`ve ni-5661 rfsa

 

plz i need an example for this.

 

thanks all

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how to read only value change data in XNET CAN ?

December 29, 2014, 5:57 am
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Im dealing with some thousand CAN signals and i want to read only the value change data in XNET CAN. Please give some solutions.

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installation win 7 profesiona| 64 bit on ni pma 1115

December 29, 2014, 8:17 pm
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i want reformat my pxi from win xp to win7 64 bit... but i cant boot up the win 7 installation which is usb flash storage...the usb flash is work fine with laptop which it can be boot up and install win 7...am i missing something to make it happen....pls advice

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