PXI-7854R has Virtex5 FPGA. I use some of the FPGA pins as digital output pins, either set to high or low states. If I load another bitfile (either the same or different) then what is the expected behavior of the digital output pins?
Xilinx references indicate that it can be configured by setting HSWAPEN to enable or disable (by pull up/down). How does PXI-7854R configure HSWAPEN pin? Is this accessible to the user?