Dear community,
I am trying to implement a (software) PXI backplane trigger on a NI PXIe-1082 chassis with LabView 2015 (32bit) running on a PXIe-8135:
- HS-DIO (PXIe-6544) in slot 2,
- DAQ (PXIe-6363) in slot 4,
- Flex RIO (PXIe-7962R+NI-6583) in slot 3.
The triggering scheme is explained in the attached file "LV-PXItrig-HSDIO-DAQ-overview.jpg".
Scenario 1: DAQ writes analogue signal and sends (software) trigger HS-DIO waveform through backplane, after waveform is complete signals back to DAQ for acquisition.
Scenario 2: Logic pulse on HS-DIO external port triggers HS-DIO waveform, after HS-DIO waveform is complete DAQ triggered for ADC acquisition through backplane.
In principle this breaks down to sending a trigger from module A to B via the PXI backplane. The PXIe-1082 chassis has one trigger bus with 8 lines (PXI_trigX, X=0,..,7) plus a star trigger controlled from slot 2.
I have tied to implement a software trigger but I cannot access the resource upon refreshing and execution, see attachement. Other implementation paths including the DAQmx Connect Terminal / Disconnect Terminal routine have not worked for me either. I am aware on how to connect trigger lines using the VISA property node but I cannot issue a trigger.
Any hints, comments or solutions are appreciated. Thanks!