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What is the sense input impedance of the 4143 SMU

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What are  the  impedances of the remote sense inputs of the 4143 SMU?


pxie-1073 trigger

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Can the PXIe-1073 drive/monitor the PXI trigger lines?

Share clock PXI

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Hello,

 

I am trying to sync different modules to acquire 3 different signals. 

1 signal is a strain gage connected to a TB4330, the second is a displacement sensor connected to another TB4330 (different one) and the last signal is a LVDT connected to SCXI1315 which is connected to the SCXI chassis and then to a PXIe6341.

I've followed the examples to share a clock but an there is an error (error-89129: terminal for the device is invalid) that appears no matter which channel I use to set the clock. 

I'm new in the sync issue so I guess it's something I might misunderstood.

Thanks for your help.

No driver associated for PCI Device on pxi-8110

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I have installed a new blank solid state hard drive on my pxi-8110. 

 

I then installed windows 7, which is NOT the operating system that originally come on the 8110. 

 

I then installed NIDAQ1450f0

 

When running Max, I have an error, There is an unknown PCI card, as shown in the attachment.

 

PCI\VEN_1093&DEV_C801&SUBSYS_C8011093&REV_02\5&32A239&0&000008

 

I have tried to install a million things to correct this, but to no avail. I dont even know what this car would be, as all the devices are currently listed.

 

The pxi-8110 is currently installed in a pxi-1031 chassis. Things seem ok with this piece of hardware. I eventually would like to run this 8110 on a pxi-1006 which has many more slots, and this does not seem to work, as the cards in the higher number slots are not recognized. 

 

Can I get some assistance with this? 

 

Thank you. 

 

 

 

 

 

How to control PXI-1031 with PXI-8336 with MatLab?

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We are trying to control a  PXI-5922 mounted in a chassis PXI-1031 connected to a PC with a PXI-8336. We want to use MatLab. In the Test&Measurement Toolbox, you should be able to see the device. This is not the case. We also installed all the drivers (NI-VISA 14.0.1 and NI-SCOPE 14.1). The weird thing is that the device can  be seen in NI-MAX, but  as we told, we can not get a connection to Matlab. Also the command 'daq.getDevices' in Matlab does not return anything ('No data acquisition devices available.').

 

What can be the problem and how should we connect the device to Matlab?

 

Thanks in advance!

 

Jeroen

PXI-5152 noise when "active"

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PXI gurus,

I am running a particularly noise sensitive experiment and it seems that the PXI-5152 itself is generating noise whenever the active LED turns from green/yellow to off (temporarily). I wanted to understand, if the "active" button is off, that means the PXI isn't triggering, but I have a laser constantly firing, so hypothetically it should always be triggering (10 Hz), but it seems that sometimes it stops for ~500 mS and then continues.

Is it possible that when the active button is on that it is generating some sort of transient noise? (noise width 10%-90% rise time is approximately 250-750 nS and the noise is around 150 mV when my baseline is 50 mV after amplifying my electrical signal 100X with a Tegam 4040B amplifier.) If so, is there a way I can mitigate this?

SHB4X-B4X Cable Pinout

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We will be using your SHB4X-B4X Infiniband cable to connect your PXIe-4492 to a custom PCB in a test panel.  

What I am looking for is the pinout of the SHB4X-B4X infiniband cable (197516-01) so I can make sure we design our custom board with the correct pinout.

 

We are also using your SHB12x-B12X Infiniband cable and it mentions that one end is the reverse of the other.  so that is why we are asking this question.

As far as the SHB12x-B12x cable this is what we have came up with for the first few pins:  (is this correct?)

 

PXI-6551 Description 192344-01 end 1   192344-01 end 2    779157-01 
Pin 1        GND            Pin 1                    Pin 73                 Pin G1 
Pin 2        PFI_1          Pin 2                    Pin 72                 Pin S1 
Pin 3        PFI_1*         Pin 3                    Pin 71                 Pin S2 
Pin 4        GND            Pin 4                    Pin 70                 Pin G2       

SHB4X-B4X and SHB12X-B12X Cable Pinouts

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We will be using your SHB4X-B4X Infiniband cable to connect your PXIe-4492 to a custom PCB in a test panel.  

What I am looking for is the pinout of the SHB4X-B4X infiniband cable (197516-01) so I can make sure we design our custom board with the correct pinout.

 

We are also using your SHB12x-B12X Infiniband cable and it mentions that one end is the reverse of the other.  so that is why we are asking this question.

As far as the SHB12x-B12x cable this is what we have came up with for the first few pins:  (is this correct?)

 

PXI-6551 Description 192344-01 end 1   192344-01 end 2    779157-01 
Pin 1        GND            Pin 1                    Pin 73                 Pin G1 
Pin 2        PFI_1          Pin 2                    Pin 72                 Pin S1 
Pin 3        PFI_1*         Pin 3                    Pin 71                 Pin S2 
Pin 4        GND            Pin 4                    Pin 70                 Pin G2       


VI:FIFO limitation or restriction?

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Hello guys.

 

I am implementing a communication system with PXIe-7965 / NI-5791.

 

The problem is element to read from FIFO.

When I set 2048 BRAM as an input FIFO, it cause an overflow (not always but blinking) (the number of element to read : 2048~2053).

But input data is continous stream, and IFFT start to read after 1+ 3 clock additional delay.

So I increase the number of element as 5012 then the number of element is only 5. I think it cannot write into FIFO correctly.

 

Through computer development simulation, it works not only algoritms but also output values.

However, after compliation PXI cause above problems.

 

I aleady searched posting relate to FIFOs

http://zone.ni.com/reference/en-XX/help/371599K-01/lvfpgaconcepts/fpga_implementation_options/

http://digital.ni.com/public.nsf/allkb/5338E45E161D74CE86256FAF0056FD84

 

But I cannot solve this issues.

 

If someone meet same problem or has been solved, feel free to advice me.

 

Thank you 

Best Regards,

Hyunwoo.

 

FYI 

System parameters

104 MHz SCTL

Control Elements to start reading IFFT : 2048 (at the attached figure)

All FIFOs : Slice Fabric

Compliation summary as

 

Compilation completed successfully.

 

Device Utilization
---------------------------
Total Slices: 64.2% (9452 out of 14720)
Slice Registers: 40.0% (23526 out of 58880)
Slice LUTs: 36.0% (21174 out of 58880)
DSP48s: 14.1% (90 out of 640)
Block RAMs: 23.4% (57 out of 244)

Timing
---------------------------
40 MHz Onboard Clock: 40.00 MHz (71.96 MHz maximum)
200 MHz Clock: 200.00 MHz (266.95 MHz maximum)
104MHz: 104.00 MHz (104.78 MHz maximum)
TS_SampleClk: 250.00 MHz (maximum)
TS_BusClk: 127.58 MHz (maximum)
TS_SlowBusClk: 131.13 MHz (maximum)
TS_DramClkDiv100: 450.25 MHz (maximum)
TS_IoRxClock: 333.33 MHz (maximum)
TS_Puma20Window_theCLIPs_IO_Module_CLIP0_Ni5791FixedLogicx_McLarenPll130x_SampleClkPllOut: 136.95 MHz (maximum)
TS_Puma20Window_theCLIPs_IO_Module_CLIP0_Ni5791FixedLogicx_McLarenPll130x_SampleClk90PllOut: 416.67 MHz (maximum)
TS_Puma20Window_theCLIPs_IO_Module_CLIP0_Ni5791FixedLogicx_McLarenPll130x_SampleClk2xPllOut: 262.26 MHz (maximum)
TS_ClockGenXilinxV5x_TxDcm_TxHighSpeedClkDcm: 272.55 MHz (maximum)
TS_ClockGenXilinxV5x_RxDcm_RxHighSpeedClkDcm: 450.25 MHz (maximum)
TS_ClockGenXilinxV5x_RxDcm_RxLowSpeedClkDcm: 163.21 MHz (maximum)

 

PXI 8196 Ethernet port is not functioning

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Hello,

 

I have a PXI-8196 controller that won't connect to a network through the ehternet port. There aren't any status lights on the ethernet port at all. Any help would be much appreciated!

 

Thanks,

 

Andrew

Where can I find pinouts for the 68 pin connectors on the PXIe-8430/8 and the PXIe-8431/8

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We need to build new cables for the PXIe-8430/8 and 8431/8 serial interface cards.

I cannot find pinout information for either of the 68 pin connectors on the front panel of these cards.

Can someone point me in the right direction to find this information.  Thank you.

NI DC Power Soft Front Panel Error - 200247

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Hello All,

 

I am having trouble opening the ni DC power soft front panel. The error message I repeatedly am seeing is below:

 

error1.PNG

 

 

When I try to run the vi mentioned in the error above, the same error occurs:

error2.PNG

 

 

How can I go about getting my soft front panel to work? I have been using the DC power API to execute tests over the past week using the example VI's, but am at a point where the soft front panel would be very helpful to my workflow.

 

I am using the following:

NI PXIe-4139 SMU

NI PXIe-1082 Chassis

NI PXIe-8360 Controller

Windows 7 64bit

Labview 14

MAX 14.5.0f0

DC Power 14.2

 

I have tried running the soft front panel using clean installs of DC Power 14.1 and 14.2 and see the same error message. I have uninstalled the other modular instrument driver packages on my computer, NI-Fgen and NI-Scope, reinstalled DC Power, and still I see the error message. It could be that I am not uninstalling these software packages 100% correctly (I use the windows add/remove to NI Remove software dialog process....)

 

I appreciate any help getting this DC Power soft front panel working.

 

Thank You,

Andrew Goett

Using Keysight M9037A Controller in a NI PXIe-1075 Chassis, need to add a slave PXIe-1065 Chassis

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Hello,

 

I have a bit of an odd configuration and I was hoping someone could confirm whether or not the PXIe-8374 will fulfill my needs or not, and if there is some other product that will.

 

Our master chassis is a NI PXIe-1075. It has a Keysight M9037A controller installed, which is working perfectly with all of the PXI cards we have installed in the chassis. However, we have a PXIe-1065 Chassis that we now need to make a slave to our PXIe-1075. In the case that we were using an NI controller, I know that a NI PXIe-8374 in the master and a NI PXIe-8370 in the slave would be the solution. However, it is unclear to me wheter or not the NI PXIe-8374 will work in a chassis (even an NI chassis) with an non-NI controller. I was hoping someone would be able to clear that up for me.

 

Thanks,

Alex

PXI 5122, 5152 MIG harware error

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I hadn't used the system in about a month, and came to find both of my PXI 5122 and 5152 cards stopped working at the same time, reporting

 

Error -239021 occured at Self-Test

Possible Reasons:

Internal Hardware Error occured in MIG hardware.

 

(with

Chasis: PXI-1000B

Controller: PXI-8330

)

 

Does this typically indicate that repairs are necessary?

 

Thanks,

Ben

Channel General properties:Description

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Hi,

 

I am trying to identify my different input channels of the PXI I am using and I would like to use the "General PropertiesSmiley Very Happyescription" field to do it. The problem seems to be really simple but I cannot find how to write this field...Capture.PNG

How can I modify it? It always generates void when I set a description in the channel constant VI or in the create channel VI.

Thanks,

Oscar


PXIe deployment with errors

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Hello,

 

I have been trying to run a program on my PXIe-1065 without success. I think I may be missing a driver or software, especifically LabVIEW Real-Time module on the host and DAQmx on the target which I both tried to install following this steps for DAQmx http://digital.ni.com/public.nsf/allkb/79CB44F7E228AED88625756E00445151?OpenDocument. Is Run-Time module the same as Real-Time?. Do I really need to insert a CD when installing the Real-Time Module? This is where I tried to download it from: http://www.ni.com/download/labview-real-time-module-2014/4832/en/. You can check the list of software I have installed on each device on the MAX screenshots.

 

Also, I got this error when trying to deploy my VI on the target:

Initializing...
Calculating dependencies...
Checking items for conflicts. This operation could take a while...
Preparing items for download. This operation could take a while...
Deploying NI-PXIe8135-2F144366(successfully deployed target settings)
Deploying whitespace.ctl (1.32 K)
Deploying Error Code Database.vi (4.39 K)
Deploying DAQmx Timing (Sample Clock).viDAQmx Timing (Sample Clock).vi loaded with errors on the target and was closed.
LabVIEW: Failed to load shared library nilvaiu.*:setTimingTerminalAP:C. Ensure that the library is present on the RT target. Use either MAX to install NI software or FTP to transfer custom libraries to the RT target.
LabVIEW: Failed to load shared library nilvaiu.*:setTimingI32EnumAP:C. Ensure that the library is present on the RT target. Use either MAX to install NI software or FTP to transfer custom libraries to the RT target.
LabVIEW: Failed to load shared library nilvaiu.*:setTimingF64U64AP:C. Ensure that the library is present on the RT target. Use either MAX to install NI software or FTP to transfer custom libraries to the RT target.
LabVIEW: Failed to load shared library nilvaiu.*:setTimingF64AP:C. Ensure that the library is present on the RT target. Use either MAX to install NI software or FTP to transfer custom libraries to the RT target.
Deploying NI-PXIe8135-2F144366 Container
Deployment completed with errors

 

On the screenshots it shows that I have the library but I cannot open it. And in MAX every slot on the PXIe has a waring symbol, why is that?

 

Thank you very much!

 

Edge trigger of two PXI digitizers not right with tclk

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I have two digitizing (scope) PXI modules (5114).  Using the example niScope EX Multi-Device Configured Acquisition (TClk) I can sync the two scopes; however, the edge trigger doesn't seem to work.  I can select the edge to be on rising or falling but the traces that are returned don't come back as if they were triggered properly (instead the phase is just random).  If I set the trigger level too high it won't trigger at all (and times out) so it seems that the trigger is working, but the traces that are returned do not have the trigger crossing at the right place (instead it is random).

 

Should edge triggering work with the TClk?  What could be causing the traces returned not synced with the trigger level.  I didn't make any changes to the example application.

what software do I need to run a VI on a PXIe-1065?

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Hello,

 

I want to run a VI on my PXIe-1065.  So far believe I need to install DAQmx and LabVIEW Real-time module on both the host and target. Do I need something else?

Also, is there a way of installing LabVIEW Real-TIme module on the host without CDs? In other words, downloading everything online.

 

Thanks

What does 14 bit resolution mean

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Hello,

 

Does the "14 bit resolution" refer to the input given to the PXI-5412 (via niFgen_CreateWaveformFromFileI16 and/or niFgen_CreateWaveformFromFileF64), the output of the PXI-5412 through channel 0, or both?  To clarify a bit, I know that niFgen_CreateWaveformFromFileI16 reads values from a 16 bit data source, but do the values contained in those 16 bits have to be inside a 14-bit range?

 

Some background info...  I am using a system containing a PXI-5412.  I am executing the example C code and modifying it for some arbitrary waveforms.  I have a spectrum analyzer connected to the output of the PXI-5412 and am trying to understand the the results.  I am using a data file that contains a chirp waveform.

 

I generate the chirp data via Matlab.  I can save it out in various formats, but started saving it off as 16-bit.  In my application, I load this data using niFgen_CreateWaveformFromFileI16 and initiate generation.  The output is being fed to a spectrum analyzer, but the result does not look like a chirp.  However, if I save the same data out as a double, and use the SAME code (NOT changing the function  niFgen_CreateWaveformFromFileI16), I see a chirp.  This result lead me to my question.

 

 

 

trigger multi chassis

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I am adding a PXIe chassis with three FlexRIO FPGAs and digitzer adapter modules to an existing PXI chassis with timing and Multifunction DAQ cards.

In this question I would like to focus on triggering all cards in the PXI and PXIe systems at the same time. For now I would like to ignore that fact that ideally all clocks of should be synchronized and am willing to have sampling time uncertainties on the order of one clock cycle between the different cards. 

 

My plan is as follows I intialize NI-Sync on the master and slave timing and synchronization module of the respective chassis. I connect software triggers to the PXI star lines of the master chassis and to a PFI line of the master syncrhonization card. Then I connect a PFI line of the slave chassis to the PXI star lines. In addition I connect the PXI clocks. Finally I trigger the software trigger. 

 

I attached an image of the setup from NI MAX and a sample NI-sync VI going through the trigger line setup.

NI-MAX - setup.png 

 

I have several questions:

 

Are there any references on multichassis triggering? I found the NI sync examples in LabVIEW and Getting started with Multichassis Synchronization useing the NI PXI-6653 and the NI PXI-4472.

 

Is the block diagram of the attached VI appropriate? Why do I get error 1074118586 "A resource necessary to complete the specified operation is not available; therefore, the operation cannot be completed" when I try to connect more than 3 PXI star lines with a PFI line?

 

What wiring is needed between the Timing and Synchronization modules for the attached code? It seems like Clock Out and Clock In of each module need to be connected and a PFI line to enable the triggering need to be connected. However, the pictures in the Timing Synchronization modules specsheets and the Getting started with Multichassis Synchronization useing the NI PXI-6653 and the NI PXI-4472 seem to indicate that 2 PFI lines must be connected between the modules and the master module must have a coax cable from one of its PFI lines to another on the same module.

 

Thank you!

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